UC知道急求计算机专业英语翻译
来源：百度知道 编辑：UC知道 时间：2024/07/07 00:50:20
Figure 2.1: Logical picture of PC memory
Prior to the 80386 chip, the Intel 80×86 family of processors could only directly address 220 bytes of memory. They used 20-bit physical addresses, often expressed as 5-hex-digit addresses ranging from 00000 to FFFFF.
The assembly language programs in this book will use a flat memory model. This means that the programs will actually encode 32-bit addresses to logically reference locations in a single memory space where data and instructions are stored.
The Intel 80×86 architecture also provides for a segmented memory model. In the original 8086/8088 CPU, this memory model was the only one available. With the 8086/8088, the PC's memory is visualized as a collection of segments, each segment 64 Kbytes long, starting on an address that is a multiple of 16. This means that one segment starts at address 00000, another (overlapping the first) starts at address 16 (0001016), another starts at address 32 (0002016), etc. Notice that t
Prior to the 80386 chip, the Intel 80×86 family of processors could only directly address 220 bytes of memory. They used 20-bit physical addresses, often expressed as 5-hex-digit addresses ranging from 00000 to FFFFF.
The assembly language programs in this book will use a flat memory model. This means that the programs will actually encode 32-bit addresses to logically reference locations in a single memory space where data and instructions are stored.
The Intel 80×86 architecture also provides for a segmented memory model. In the original 8086/8088 CPU, this memory model was the only one available. With the 8086/8088, the PC's memory is visualized as a collection of segments, each segment 64 Kbytes long, starting on an address that is a multiple of 16. This means that one segment starts at address 00000, another (overlapping the first) starts at address 16 (0001016), another starts at address 32 (0002016), etc. Notice that t
图2.1:逻辑图画80386芯片的电脑记忆前, 英特尔处理器家族的80×86只能220字节的存储器直接地址. 他们用20位物理地址,往往表现为5-六角数字地址给fffff00000不等. 大会也将在这本书中使用的语言节目记忆示范单位. 这实际上意味着节目编码32位逻辑地址为参考位置在单一数据存储空间和指令存放. 英特尔架构的80×86还规定了内存分段模型. 在原8088分之8086的CPU,这是唯一可记忆模型. 随着八千〇八十八分之八千〇八十六,筹委会的记忆是一个集可视部分,每部分长64kBytes, 演讲一开始即16多种. 这意味着一个环节开始地址00000,另一(重叠首)开始地址16(0001016) 另针对32级开始(0002016) 公告说,从地址等部分结束时写0六角. 部分若干部分组成,前4位的物理地址六角. 节目编码写的不八千零八十八分之八千零八十六五六角数字地址. 反之,各部分多少取决于其记忆参考了16位从一开始的部分抵销. 通常只有抵消编码、部分号码是推断. 偏移距离是第一部分的字节字节的美事. 在六角,并抵消介于0000ffff. 部分的符号胶印地址四六角数字多少依次为结肠部分(:)遵循四个六角数字抵销.